灵活的Hopfield神经网络ADC消除噪声

　　英文原文：

　　Flexible Hopfield neural-network ADCs quash noise

　　Simple resistor-comparator circuits form a robust Hopfield neural-network ADC.

　　Paul J Rose, PhD, Mental Automation, Renton, WA; Editedby Charles H Small and Fran Granville -- EDN, 1/24/2008

　　A Hopfield network can convert analog signals into digital format and can perform associative recalling, signal estimation, and combinatorial optimization similar to the way a human retina performs first-level signal processing. This Design Idea explores the Hopfield-neural-network paradigm for ADCs.

　　Simple converters comprise one-layer neurons that accept analog inputs and generate digital-bit outputs; such neurons make up one form of adaptive- and distributive-processing networks. These neurons comprise voltage comparators driving either analog inverters or followers and fully connected feedback resistors from the analog outputs of the inverters or followers to the comparators (figure 1 and figure 2). Reference and analog-input voltages drive the neural networks, and digital outputs come from the comparators in the networks. Hopfield networks have learning capabilities; the circuit in this Design Idea can apply different adaptive-learning rules by using alternative comparator-inverter/comparator-follower schemes, conductance-node-layout schemes—reciprocals of the feedback resistances—between the input comparators, and bit-order readouts.

　　As the analog-input voltage increases, the circuit can produce either monotonically increasing (from a comparator-inverter scheme) or decreasing (from a comparator-follower scheme) bit-word outputs. Decreasing outputs are the complements of increasing outputs and suggest subtractive-bit operations. Further, you can shape the digital responses of the converters to analog-input voltages in varying degrees using different conductance-node layouts as part of rule adaptation. For further flexibility, reversing bit order for digital readouts allows for reflection of circuit responses about analog-input/digital-output characteristics.

　　You can simply state a few symbols and their meanings to construct the two converters. For energy functions, the resistive network conductances—synapse weightings (S) in the form of reciprocal resistances (R)—have the designations SIJ="1/RIJ", where I is the Ith input comparator, J is the Jth feedback path to the Ith comparator, and I does not equal J—that is, there is no self-feedback path of the comparator to itself. The conductance between the input terminal of the Ith comparator and the reference voltage, VR, has the designation SIR="1/RIR". The conductance between the input terminal of the Ith comparator and the analog-input-signal voltage, VS, has the designation SIS="1/RIS".

　　For graphical curve fittings, Y is the normalized output-bit variable, and X is the normalized input analog voltage from a nonzero average value (less than one) to one. A, B, and C are curve-fitting constants in the curve equation Y="1"–A×(1–X)C and the complementary-curve equation Y="A"×(1–X)C, where A is a coefficient, B is the lower limit for X and is less than one, and C is a power constant. For bit-pattern readout reversals, you can have the curve equation Y="A"×(X–B)C and the complementary-curve equation Y="1"–A×(X–B)C.